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SEAMS 
 SEAMS is a mixed-signal simulator for models written in the VHDL-AMS language. This initial version implements about 90% of the full language. Also available in the same site are a Spice-to-VHDL-AMS translator (version 2.0) and Discrete-Event Flow Diagram simulator (DEFDsim). 
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Current Version:   1.1c
 License Type: ?? 
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Home Site:
 Source Code Availability: Yes 
Available Binary Packages:
 
 Targeted Platforms: Software/Hardware Requirements: 
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